OPEN ACCESS RESEARCH
RADICAL is committed to Open Access research and is taking part in a European Commission pilot on Open Access to Research Data.
All publications from the RADICAL project are freely accessible and published as open access articles at either gold or green standard.
Our research publications and data are stored in an open-access data repository on Zenodo to enable future researchers to access, exploit, reproduce and disseminate our data. This repository is validated as Open Access by OpenAIRE, with an associated OpenAIRE project page.
Si nanowires-based devices are used for various applications. The nanowires have a high surface-to-volume ratio which among other properties makes them suitable for sensing applications. The sensing devices for “RADICAL” are, therefore, being fabricated on a nanowires platform. The nanowires are fabricated using a top-down process. Electron beam lithography and dry etching processes are used details of which are given in the experimental section. Furthermore, this manuscript reports a reproducible silicidation process of these nanowires.
This publication and dataset were published in ACS Langmuir on 3rd Dec 2021.
Citation: Muhammad Bilal Khan, Slawomir Prucnal, Sayantan Ghosh, Dipjyoti Deb, René Hübner, Darius Pohl, Lars Rebohle, Thomas Mikolajick, Artur Erbe, and Yordan M. Georgiev. Langmuir 2021 37 (49), 14284-14291. DOI: 10.1021/acs.langmuir.1c01862
A 3D model of silicon three gate nanowire junctionless transistor is developed in COMSOL Multiphysics. It is based on Gummel approach with Green’s functions. The model describes output I-V characteristics. Modeling results are verified against reference experimental data with average accuracy of 11%. Simulation of gate materials with different work functions that are used in practice is performed. The charge distribution along the nanowire depending on gate length is also studied.
This paper is a conference proceedings from the MIEL conference that took place in Niš, Serbia between 12-14 September 2021.
Citation: R. Rusev et al., “COMSOL Model of a Three-Gate Junctionless Transistor,” 2021 IEEE 32nd International Conference on Microelectronics (MIEL), 2021, pp. 93-96, doi: 10.1109/MIEL52794.2021.9569053.
Channel length influence on the nanowire parameters and characteristics at different gate voltages for applications in junctionless transistors (JLTs) are analyzed. The density-gradient effective mass tensor of the charge carriers is studied. The results obtained are used to indicate a compromise between performance and minimum dimensions for JLT sensor applications.
This paper is a conference proceedings from the Mixed Design of Integrated Circuits and Systems (MIXDES) conference that took place in Łódź, Poland between 24-26 June 2021.
Citation: R. Rusev et al., “Study of Nanowire Characteristics of a Junctionless Transistor Depending on the Gate Length,” 2021 28th International Conference on Mixed Design of Integrated Circuits and System, 2021, pp. 184-187, doi: 10.23919/MIXDES52406.2021.9497541.
A selection of materials and atmospheric chemistry research which has shaped our project proposal: